A practical guide to the theory, operation and selection of
Spread Spectrum Clocks (continued)

What about Jitter

A clock oscillator generates a fixed frequency square wave signal used for timing in high-speed digital systems. The frequency of this clock is assumed to be fixed at some ideal frequency, which, taking the inverse of frequency gives us the ideal period of the clock. The period of the clock is the time from a point on the rising edge to the exact same point on the rising edge of the very next clock. An ideal clock would have no measurable jitter and the period of each clock cycle would always be the same. The illustration below shows a 50 MHz clock frequency, which is a period of 1/50 MHz = 20 ns.

Figure 7.

If every subsequent clock after this first clock had the same Tc, the clock would have no jitter. This is practically impossible as all clocks have some jitter. When the period of a clock changes from 20 ns to 20.1 ns, we say that the cycle to cycle jitter of these two back to back clocks is 100 ps (picoseconds). Jitter can be measured with equipment manufactured by Agilent, LeCroy, Tektronix and others, to a very high degree of accuracy.

In the case of a Low EMI clock oscillator, the purpose of this product is to vary the frequency of the ideal clock so that energy is distributed over a narrow band of frequencies. By varying the frequency of a clock, the period of that clock is also changed which is the same as jitter. With a Low EMI clock, the frequency is changed at a very slow rate, compared to the clock frequency, which adds very little cycle-to-cycle jitter to the clock.

Just how much jitter is added to a modulated clock can be evaluated by using a modulation domain analyzer and a little simple math. In figure 8, we have the modulation profile of a 50 MHz modulated clock.

To estimate the amount of cycle-to-cycle jitter added to the clock as a result of modulation, do the following;

Figure 8.

Select a region of the profile with the greatest slope and measure the region time;
∆T = 15 – 12.5 = 2.5 us
Measure the period change within the region:

Period of 50.312 MHz = 19.88 ns
Period of 50.625 MHz = 19.75 ns
∆P = 19.88 – 19.75 = 0.13 ns

Calculate the number of clocks in the region:
N = dt/T = 2.5us/19.88 ns = 126

Calculate the average period change in the measurement region;
CCJ = 0.13 ns/126 = 1.032 ps.

From this demonstration we see that 1.032 ps of jitter was added to the cycle-to-cycle jitter of the 50 MHz clock as a result of modulating the clock frequency with the above profile. Other frequencies and profiles will yield different numbers.

REGULATORY AGENCIES

Through out the world, almost every country employs a government agency that regulates the emission standards of wanted and unwanted RF energy. Unwanted RF energy is considered EMI, which causes interference in local receiving equipment such as television, radio, cell phones and pagers.

Agencies, such as the Federal Communications Commission, regulate the amount of radiated energy in terms of voltage, distance and frequency. The, FCC, has two classes of radiation levels, stated as Class A and Class B. Class A devices are digital devices intended for use in commercial, industrial or businesses and not intended for use by the general public or in the home. Class B digital devices are intended to be used in the home but could also be use elsewhere. Class B levels are harder to meet than Class A.

The following chart lists the voltage levels allowed under FCC Rules and Regulations, Part 15, for both Class A and Class B in 10 meter (Class A) and 3 meter (Class B).

Table 1. FCC Class A and B Limits

If the equipment under test exceeds these limits, as measured by a calibrated receiver in a special chamber, the excess energy must be reduced to within agency limits before the equipment can pass agency regulations. Reducing the excess amount of EMI to just under the agency limits is dangerous because there is no guarantee that the differences in manufacturing and environmental changes might cause the energy to increase slightly. Most larger companies require there digital system designs to have a built in safety margin to ensure that the device always complies with agency limits even when manufacturing processes change or environmental conditions affect operation. Reducing a particular offending frequency that is 10 dB, for example, over the limit at the 5th harmonic can be very difficult. The problem is further complicated when the company requires that a 6-dB margin be maintained before the product can be manufactured.

Replacing the original clock source with a Spread Spectrum Clock Oscillator is the only way to systemically reduce EMI by a large amount. Referring to the picture below, the fundamental 96 MHz clock has been reduced by 7 dB by replacing the original clock oscillator with an EMC Component Group Spread Spectrum Clock Oscillator.

Figure 9.

Looking at the first spectrum scan, you can see that at the 96 MHz fundamental frequency of this clock, the dB reduction by using an SSC clock is greater than 7.5 dB. Looking at the lower scan, which is the 5th harmonic of 96 MHz, the dB reduction is greater than 16.5 dB.

These two scans are clear proof that using a clock with Spread Spectrum technology is the only way to reduce large amounts of unwanted EMI.

Figure 10.

Using an EMC Component Group Spread Spectrum Clock Oscillator is the most efficient way of reducing EMI in a new or existing digital system design.

EMC Component Group has a family of Spread Spectrum Clock Oscillators available in 4 package or PCB footprint sizes, including 5 X 7 Surface Mount, 8 pin DIP, 14 pin DIP and other Surface Mount sizes.

EMC Component Group Spread Spectrum Clock Oscillators are specially suited for a wide range of applications, including Automotive, Medical, Industrial control and computer peripherals such as printer, scanner, copiers and many others.